This invention pertains generally to pulse Doppler radar receivers, and more particularly to an improved receiver intended for use with a Fast Fourier Transfor (FFT) processor without any need for automatic gain control.
As is known in the art, automatic gain control (AGC) circuitry is usually incorporated in a pulse Doppler radar receiver, especially one intended for use in a missile seeker, in order that such a receiver may operate effectively in an environment in which a desired signal must compete with undesired signals (such as jamming signals, clutter and signals from unwanted targets) over a wide dynamic range. In such a receiver, all input signals are first impressed on a bank of roughing filters (centered on the target Doppler frequency), and the signals passed through such filters are then impressed on an intermediate frequency (I.F.) amplifier incorporating so-called "fast" AGC circuitry to provide signals for an analog-to-digital (A/D) converter with a limited dynamic range. If the AGC loop closeout frequency is greater than the bandwidth of the roughing filters, the AGC loop will effectively normalize all signal level variations existing at the output of the roughing filters so that the A/D converter may operate properly.
Although a receiver with fast AGC circuitry is effective against jamming signals, slow AGC circuitry is better suited for operation when signals from a number of targets are present or a desired target is in clutter. In the latter such situations, the simumtaneous presence of more than one target line in the roughing filter bandwidth will appear to fast AGC circuitry as a variation in signal level with the result that the AGC circuitry will respond to suppress the apparent signal level variations, thereby causing cross-modulation distortion or signal spreading losses and creating false target lines. The net effect is often a loss of target track. On the other hand, although a slow AGC loop following the roughing filters is desirable to handle the multiple target and target in clutter situations, a slow AGC loop is vulnerable to saturation, with an attendant excessively long recovery time when jamming signals are received.
The dichotomy between fast and slow AGC has heretofore been resolved by using a receiver without any AGC loops, but with a dynamic range wide enough to avoid saturation under any operating conditions. Such a receiver may, for example, be similar to the one shown in U.S. Pat. No. 4,208,632, Sheldon et al, issued June 17, 1980 and assigned to the same assignee as the present application. In that receiver, the monopulse sum signal out of the roughing filters is first downconverted to a video signal which is then divided to produce four separate baseband video signals amplitude-weighted to provide a total of 102 dB of dynamic range. Each of the four separate baseband video signals then is sampled in a set of four identical sample/hold circuits. A window comparator and a control logic network then are operative to determine and select the sample/hold circuit containing the largest sample value which is less than full scale, which sample is passed, via an 8 bit A/D converter, to an FFT signal processor. A 2 bit exponent word is also passed to allow the selected sample to be appropriately scaled within the FFT signal processor. The value of the 8 bit A/D output is multiplied, by 8 raised to the number of the channel selected, to reconstruct the original signal. However, gain and phase errors between adjacent channels distort such reconstruction when the signal amplitude varies between ranges. A 5 bit overlap between adjacent channels is provided to moderate this distortion.